2024-05-18 22:11:03 -04:00
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/* src/script.lds */
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2024-05-13 18:31:37 -04:00
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OUTPUT_ARCH("riscv")
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2024-05-15 21:44:54 -04:00
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ENTRY(_enter)
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2024-05-13 18:31:37 -04:00
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MEMORY {
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ram (wxa) : ORIGIN = 0x80000000, LENGTH = 128M
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}
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PHDRS {
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text PT_LOAD;
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data PT_LOAD;
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bss PT_LOAD;
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}
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SECTIONS {
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2024-05-16 00:17:35 -04:00
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. = ORIGIN(ram); # start at 0x8000_0000 (DRAM)
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2024-05-13 18:31:37 -04:00
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.text : { # put code first
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2024-05-18 21:02:40 -04:00
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PROVIDE(_text_start = .);
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2024-05-13 18:31:37 -04:00
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*(.text.init) # start with anything in the .text.init section
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*(.text .text.*) # then put anything else in .text
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PROVIDE(_text_end = .);
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2024-05-13 18:31:37 -04:00
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} >ram AT>ram :text # put this section into the text segment
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PROVIDE(_global_pointer = .); # this is magic, google "linker relaxation"
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.rodata : { # next, read-only data
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PROVIDE(_rodata_start = .);
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*(.rodata .rodata.*)
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PROVIDE(_rodata_end = .);
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} >ram AT>ram :text # goes into the text segment as well (since instructions are generally read-only)
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.data : { # and the data section
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2024-05-18 21:02:40 -04:00
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. = ALIGN(4096);
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PROVIDE(_data_start = .);
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*(.sdata .sdata.*) *(.data .data.*)
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PROVIDE(_data_end = .);
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} >ram AT>ram :data # this will go into the data segment
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.bss :{ # finally, the BSS
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PROVIDE(_bss_start = .); # define a variable for the start of this section
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*(.sbss .sbss.*) *(.bss .bss.*)
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PROVIDE(_bss_end = .); # ... and one at the end
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} >ram AT>ram :bss # and this goes into the bss segment
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2024-05-18 21:02:40 -04:00
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PROVIDE(_memory_start = ORIGIN(ram));
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2024-05-14 11:03:08 -04:00
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2024-05-18 21:02:40 -04:00
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. = ALIGN(16); # stack is 16-byte aligned, per the C calling convention
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PROVIDE(_stack_start = .);
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PROVIDE(_stack_end = _stack_start + 0x80000); # reserve 0x80000 bytes for the stack
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PROVIDE(_memory_end = ORIGIN(ram) + LENGTH(ram));
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2024-05-18 22:09:22 -04:00
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PROVIDE(_heap_start = _stack_end); # allocate heap to remaining physical memory
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PROVIDE(_heap_size = _memory_end - _heap_start); # capture size of heap
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2024-05-13 18:31:37 -04:00
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}
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