diff --git a/src/entry.rs b/src/entry.rs
index 40534b5..9843fa7 100644
--- a/src/entry.rs
+++ b/src/entry.rs
@@ -1,8 +1,12 @@
 // src/entry.rs
+
+use riscv::register::mepc;
+
 #[no_mangle]
 #[link_section = ".text.init"]
 unsafe extern "C" fn _entry() {
     use core::arch::asm;
+    use riscv::register::{mhartid, satp, mstatus, sstatus};
     // let id = riscv::register::mhartid::read();
     // write_tp(&id);
     // TODO set up stack for all harts
@@ -29,9 +33,9 @@ unsafe extern "C" fn _entry() {
         ".option pop",
     );
 
-    riscv::register::satp::write(0);
+    satp::write(0);
 
-    let id = riscv::register::mhartid::read();
+    let id = mhartid::read();
     if id != 0 { crate::abort(); }
 
     // Clear BSS section
@@ -45,10 +49,13 @@ unsafe extern "C" fn _entry() {
         "bne t0, t1, 1b",
 
     "2:",
-        "la sp, _stack_end",
+        "la sp, _stack_end"
+    );
 
-        "li t0, (0b11 << 11) | (1 << 13)",
-        "csrw mstatus, t0",
+    mstatus::set_mpp(mstatus::MPP::Machine);
+    mstatus::set_fs(sstatus::FS::Initial);
+
+    asm!(
         "csrw mie, x0",
 
         "la t1, {kinit}",
@@ -59,6 +66,7 @@ unsafe extern "C" fn _entry() {
     "2:",
         kinit = sym kinit,
     );
+    
 }
 
 #[no_mangle]