Delete redundant entry code

This commit is contained in:
gil 2024-05-22 23:30:01 -05:00
parent 2aad0977f1
commit 4edcebba18

View file

@ -1,113 +0,0 @@
// src/entry.rs
#![no_std]
#![no_main]
use crate::uart;
mod heap;
mod uart;
static INIT_LOCK: spin::Once<()> = spin::Once::new();
core::arch::global_asm!(include_str!("entry.s"));
/// After some initialization in asm/entry.S, the kernel will jump here and
/// each hart will have its own setup sequence.
#[no_mangle]
unsafe extern "C" fn _start() {
use core::arch::asm;
use riscv::register::{mepc, mstatus, satp, sie, sstatus};
// Set previous privilege for all harts to M-mode, set previous interrupt
// enable, and set floating-point unit to initial state
mstatus::set_mpp(mstatus::MPP::Supervisor);
mstatus::set_mpie();
mstatus::set_fs(sstatus::FS::Initial);
// Store ref to main in M-mode exception program counter
mepc::write(main as usize);
// Disable paging
satp::write(0);
// Delegate all traps to S-mode, using inline assembly since we have not
// provided a wrapper for it yet
asm!("li t0, 0xffff", "csrw medeleg, t0", "csrw mideleg, t0",);
// Enable S-mode external, timer, and software interrupts
sie::set_sext();
sie::set_stimer();
sie::set_ssoft();
// TODO configure PMP
// TODO timer init
// Use mret to jump to main
asm!("mret");
}
extern "C" fn main() {
use riscv::interrupt;
use riscv::register::{mstatus, sstatus};
if hartid() == 0 {
INIT_LOCK.call_once(|| {
// Disable machine interrupts while initializing
interrupt::machine::disable();
console_init();
// TODO Write boot message
// TODO Set up paging
// TODO Set up processes
// TODO Set up trap vectors
// TODO Set up PLIC
kinit();
unsafe {
mstatus::set_mpp(mstatus::MPP::User);
mstatus::set_mpie();
mstatus::set_spie();
mstatus::set_fs(sstatus::FS::Initial);
}
riscv::asm::fence(); // Emit a fence just in case
});
// poll console for input and print characters back
loop {
let c = crate::uart::CONSOLE.lock().as_mut().and_then(crate::uart::Device::get);
if let Some(c) = c { crate::print!("{}", c as char); }
}
} else {
INIT_LOCK.wait();
riscv::asm::fence(); // Emit a fence just in case
kinit_hart();
}
}
fn console_init() {
// Initialize heap
unsafe { crate::heap::init(); };
// Set up UART and print to console
crate::uart::init_console(0x1000_0000);
crate::println!("Hello from hart {}!", hartid());
}
fn kinit() {}
fn kinit_hart() {}
#[inline]
fn hartid() -> usize {
use core::arch::asm;
let id: usize;
unsafe {
asm!(
"mv {id}, tp",
id = out(reg) id,
);
}
id
}