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gil 2024-05-19 17:48:59 -05:00
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README.md
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@ -3,15 +3,17 @@ created: 2024-05-13T14:28:49-05:00
modified: 2024-05-19T17:41:01-05:00
---
# kernel
A kernel for RISC-V written in Rust. Currently focused on running on QEMU generic riscv64, advice and assistance welcome & encouraged.
# Progress
## Progress
* **2024-05-19:** As of right now, the basic "stuff" for initializing the kernel is there. The diagram below shows what I'm thinking as far as what the init process should be. This is what I'm currently working on implementing, and I will update this chart (and prettify it) more
![Flowchart (tentatively) showing the plan for the kernel's initialization process. On the left is hart 0, the main hardware thread, and on the right is hart 1...n, all other hardware threads. All harts will set the global, stack, and thread pointers, disable paging, and set the mstatus and mepc control status registers, before doing their own independent init processes. Hart 0 will disable interrupts and enter the primary initialization function, kinit, before starting the first user process. Other harts will enable interrupts, do their own init, kinit_hart, then wait for a software inter-processor interrupt.](20240519-kernel_init_diagram.png)
# Research and implement
## Research and implement
- [ ] Basics
- [ ] Processes
@ -30,6 +32,6 @@ A kernel for RISC-V written in Rust. Currently focused on running on QEMU generi
- [ ] Device drivers
- [ ] User applications
# Resources
## Resources
See [RESOURCES.md](RESOURCES.md)