From eee7c6f02b2a996bdba6797986b694b5da02ce5d Mon Sep 17 00:00:00 2001
From: gil <kalanggam@proton.me>
Date: Mon, 20 May 2024 09:42:25 -0500
Subject: [PATCH] Make init lock less ambiguous, add fences

---
 src/entry.rs | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/entry.rs b/src/entry.rs
index 6c6c223..e41550e 100644
--- a/src/entry.rs
+++ b/src/entry.rs
@@ -1,6 +1,6 @@
 // src/entry.rs
 
-static READY: spin::Once<()> = spin::Once::new();
+static INIT_LOCK: spin::Once<()> = spin::Once::new();
 
 /// After some initialization in asm/entry.S, the kernel will jump here and
 /// each hart will have its own setup sequence.
@@ -42,7 +42,7 @@ extern "C" fn main() {
     use riscv::register::{mstatus, sstatus};
 
     if hartid() == 0 {
-        READY.call_once(|| {
+        INIT_LOCK.call_once(|| {
             // Disable machine interrupts while initializing
             interrupt::machine::disable();
             // TODO Initialize console
@@ -62,10 +62,11 @@ extern "C" fn main() {
                 mstatus::set_fs(sstatus::FS::Initial);
             }
 
-            riscv::asm::fence();
+            riscv::asm::fence(); // Emit a fence just in case
         });
     } else {
-        READY.wait();
+        INIT_LOCK.wait();
+        riscv::asm::fence(); // Emit a fence just in case
         kinit_hart();
     }
 }