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14 commits 1 branch 0 tags 310 KiB
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4 commits

Author SHA1 Message Date
gil c22e3e4376 Initializing heap 2024-05-14 10:03:08 -05:00
gil 3e197b9882 Rename project and change target to riscv64imac 2024-05-14 09:41:57 -05:00
gil 41a450393e Add rx ability to uart 2024-05-13 22:59:41 -05:00
gil 63a2a76b0b Initial commit 2024-05-13 17:31:37 -05:00