gil/kernel
1
0
Fork 0
Code Issues Pull requests Actions Packages Projects Releases Wiki Activity

Compare commits

base: gil:2bce140e57fcfee175f061a843200dc75a369796
Branches Tags
gil:main
..
compare: gil:7f183c771297982be990eeacbdafffe0f8206179
Branches Tags
gil:main

2 commits
2bce140e57 ... 7f183c7712

Author SHA1 Message Date
gil 7f183c7712 Fixed kernel hanging by disabling timer interrupts 2024-05-17 10:40:55 -05:00
gil eab775e875 Comment result of inspecting disassembly 2024-05-17 10:18:37 -05:00
1 changed files with 17 additions and 17 deletions
Show stats Expand all files Collapse all files

34
src/main.rs
View file

@ -31,28 +31,28 @@ unsafe extern "C" fn _enter() -> ! {
"la gp, _global_pointer", "la gp, _global_pointer",
".option pop", // pops the current option stack ".option pop", // pops the current option stack
// // delegate all traps to S-mode trap handler // delegate all traps to S-mode trap handler
// "li t5, 0xffff", "li t5, 0xffff",
// "csrw medeleg, t5", // delegate all machine exceptions "csrw medeleg, t5", // delegate all machine exceptions
// "csrw mideleg, t5", // delegate all machine interrupts "csrw mideleg, t5", // delegate all machine interrupts
// set the stack pointer // set the stack pointer
"la sp, _init_stack_top", "la sp, _init_stack_top",
// // Make sure machine mode is set, and enable coarse interrupts // Make sure machine mode is set, and enable coarse interrupts
// "li t0, (0b11 << 11) | (1 << 7) | (1 << 3)", "li t0, (0b11 << 11) | (1 << 7) | (1 << 3)",
// "csrw mstatus, t0", "csrw mstatus, t0",
// // Set mtvec to the location of our trap handler function // Set mtvec to the location of our trap handler function
// "la t1, {trap_vector}", "la t1, {trap_vector}",
// "csrw mtvec, t1", "csrw mtvec, t1",
// // Set MSIE, MTIE, and MEIE on machine interrupt enable CSR: // Set MSIE, MTIE, and MEIE on machine interrupt enable CSR:
// // MSIE to enable machine-/M-mode software interrupts // (1 << 3) = MSIE to enable machine-/M-mode software interrupts
// // MTIE to enable M-mode timer interrupts // | (1 << 7) = MTIE to enable M-mode timer interrupts (disabled for now)
// // MEIE to enable M-mode external interrupts // | (1 << 11) = MEIE to enable M-mode external interrupts
// "li t2, (1 << 3) | (1 << 7) | (1 << 11)", "li t2, (1 << 3) | (1 << 11)",
// "csrw mie, t2", "csrw mie, t2",
// clear the BSS // clear the BSS
"la t0, _bss_start", "la t0, _bss_start",
@ -75,7 +75,7 @@ unsafe extern "C" fn _enter() -> ! {
// "tail-call" to {start} (call without saving a return address) // "tail-call" to {start} (call without saving a return address)
"tail {start}", "tail {start}",
start = sym start, // {start} refers to the function [start] below start = sym start, // {start} refers to the function [start] below
//trap_vector = sym trap::trap_handler, // {trap_vector} refers to function [trap::trap_handler] trap_vector = sym trap::trap_handler, // {trap_vector} refers to function [trap::trap_handler]
options(noreturn) // we must handle "returning" from assembly options(noreturn) // we must handle "returning" from assembly
); );
} }