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Author SHA1 Message Date
gil 556a9841e5 Prints 'Hello World' 2024-05-13 22:07:46 -05:00
gil 78f93533a4 Prettifying 2024-05-13 21:42:49 -05:00
gil 78ba8f22a6 Add links to RISC-V spec pdfs 2024-05-13 21:37:28 -05:00
3 changed files with 16 additions and 5 deletions

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@ -10,4 +10,5 @@ runner = """ qemu-system-riscv32
-m 150M -m 150M
-s -s
-nographic -nographic
-serial mon:stdio
-bios """ -bios """

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@ -6,11 +6,21 @@ modified: 2024-05-13T14:28:52-05:00
# Reading list # Reading list
## Beginner tutorial ## Beginner tutorial
- https://www.meyerzinn.tech/posts/2023/03/05/running-rust-code-on-risc-v-in-qemu/ - Meyer Zinn's RISC-V kernel guide
- https://www.meyerzinn.tech/posts/2023/03/08/p1-printing-and-allocating/ - [Part 0](https://www.meyerzinn.tech/posts/2023/03/05/running-rust-code-on-risc-v-in-qemu/)
- [Part 1](https://www.meyerzinn.tech/posts/2023/03/08/p1-printing-and-allocating/)
## Other reading ## Other reading
- https://osblog.stephenmarz.com/ch1.html - https://osblog.stephenmarz.com/ch1.html
- https://os.phil-opp.com/ - https://os.phil-opp.com/
- https://github.com/skyzh/core-os-riscv - https://github.com/skyzh/core-os-riscv
- https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html - https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html
## RISC-V Spec
- [Volume I: Unprivileged](https://riscv.org/wp-content/uploads/2019/12/riscv-spec-20191213.pdf)
- [Volume II: Privileged](https://riscv.org/wp-content/uploads/2019/08/riscv-privileged-20190608-1.pdf)
## Videos
- [Sarah Jamie Lewis's "Let's Build An OS" series](https://www.youtube.com/watch?v=s_4tFz52jbc) (Note: it *can* run Doom)
- [Dr. Harry Porter's lectures on the xv6 kernel](https://www.youtube.com/watch?v=fWUJKH0RNFE&list=PLbtzT1TYeoMhTPzyTZboW_j7TPAnjv9XB)
- [LaurieWired's RISC-V Assembly primer](https://www.youtube.com/watch?v=0IeOaiKszLk)

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@ -37,6 +37,6 @@ SECTIONS {
PROVIDE(_bss_end = .); # ... and one at the end PROVIDE(_bss_end = .); # ... and one at the end
} >ram AT>ram :bss # and this goes into the bss segment } >ram AT>ram :bss # and this goes into the bss segment
. = ALIGN(16) # our stack needs to be 16-byte aligned, per the C calling convention . = ALIGN(16); # our stack needs to be 16-byte aligned, per the C calling convention
PROVIDE(_init_stack_top = . + 0x1000) # reserve 0x1000 bytes for the initialisation stack PROVIDE(_init_stack_top = . + 0x1000); # reserve 0x1000 bytes for the initialisation stack
} }