Compare commits
	
		
			No commits in common. "556a9841e5c57f2420186917da3d4d44a49fe9be" and "2cce36b1329e4239a74ceffbfdc3f1b763a8ae4e" have entirely different histories.
		
	
	
		
			556a9841e5
			...
			2cce36b132
		
	
		
|  | @ -10,5 +10,4 @@ runner = """ qemu-system-riscv32 | |||
|   -m 150M | ||||
|   -s | ||||
|   -nographic | ||||
|   -serial mon:stdio | ||||
|   -bios """ | ||||
							
								
								
									
										14
									
								
								README.md
									
									
									
									
									
								
							
							
						
						
									
										14
									
								
								README.md
									
									
									
									
									
								
							|  | @ -6,21 +6,11 @@ modified: 2024-05-13T14:28:52-05:00 | |||
| # Reading list | ||||
| 
 | ||||
| ## Beginner tutorial | ||||
| - Meyer Zinn's RISC-V kernel guide | ||||
|   - [Part 0](https://www.meyerzinn.tech/posts/2023/03/05/running-rust-code-on-risc-v-in-qemu/) | ||||
|   - [Part 1](https://www.meyerzinn.tech/posts/2023/03/08/p1-printing-and-allocating/) | ||||
| - https://www.meyerzinn.tech/posts/2023/03/05/running-rust-code-on-risc-v-in-qemu/ | ||||
| - https://www.meyerzinn.tech/posts/2023/03/08/p1-printing-and-allocating/ | ||||
| 
 | ||||
| ## Other reading | ||||
| - https://osblog.stephenmarz.com/ch1.html | ||||
| - https://os.phil-opp.com/ | ||||
| - https://github.com/skyzh/core-os-riscv | ||||
| - https://twilco.github.io/riscv-from-scratch/2019/04/27/riscv-from-scratch-2.html | ||||
| 
 | ||||
| ## RISC-V Spec | ||||
| - [Volume I: Unprivileged](https://riscv.org/wp-content/uploads/2019/12/riscv-spec-20191213.pdf) | ||||
| - [Volume II: Privileged](https://riscv.org/wp-content/uploads/2019/08/riscv-privileged-20190608-1.pdf) | ||||
| 
 | ||||
| ## Videos | ||||
| - [Sarah Jamie Lewis's "Let's Build An OS" series](https://www.youtube.com/watch?v=s_4tFz52jbc) (Note: it *can* run Doom) | ||||
| - [Dr. Harry Porter's lectures on the xv6 kernel](https://www.youtube.com/watch?v=fWUJKH0RNFE&list=PLbtzT1TYeoMhTPzyTZboW_j7TPAnjv9XB) | ||||
| - [LaurieWired's RISC-V Assembly primer](https://www.youtube.com/watch?v=0IeOaiKszLk) | ||||
|  | @ -37,6 +37,6 @@ SECTIONS { | |||
|     PROVIDE(_bss_end = .); # ... and one at the end | ||||
|   } >ram AT>ram :bss # and this goes into the bss segment | ||||
| 
 | ||||
|   . = ALIGN(16); # our stack needs to be 16-byte aligned, per the C calling convention | ||||
|   PROVIDE(_init_stack_top = . + 0x1000); # reserve 0x1000 bytes for the initialisation stack | ||||
|   . = ALIGN(16) # our stack needs to be 16-byte aligned, per the C calling convention | ||||
|   PROVIDE(_init_stack_top = . + 0x1000) # reserve 0x1000 bytes for the initialisation stack | ||||
| } | ||||
		Loading…
	
		Reference in a new issue