src/main.rs

@@ -39,21 +39,8 @@ unsafe extern "C" fn _enter() -> ! {
         // set the stack pointer
         "la sp, _init_stack_top",
 
-        // We use mret here so that the mstatus register
+        "la t2, {trap_vector}",
-        // is properly updated.
+        "csrw mtvec, t2",
-        "li t0, (0b11 << 11) | (1 << 7) | (1 << 3)",
-        "csrw mstatus, t0",
-        
-        // Set mtvec to the location of our trap handler function
-        "la t1, {trap_vector}",
-        "csrw mtvec, t1",
-
-        // Set MSIE, MTIE, and MEIE on machine interrupt enable CSR:
-        //   MSIE to enable machine-/M-mode software interrupts
-        //   MTIE to enable M-mode timer interrupts
-        //   MEIE to enable M-mode external interrupts
-        "li t2, (1 << 3) | (1 << 7) | (1 << 11)",
-        "csrw mie, t2",
 
         // clear the BSS
         "la t0, _bss_start",
@@ -109,24 +96,12 @@ extern "C" fn start() -> ! {
     }
 }
 
-#[no_mangle]
-extern "C" fn eh_personality() {}
-
 #[panic_handler]
-fn panic(info: &PanicInfo) -> ! {
+fn on_panic(info: &PanicInfo) -> ! {
-    // print panic info and abort
+    // print panic info and hang
     println!("{}", info);
-    abort();
-}
 
-#[no_mangle]
+    loop {}
-extern "C" fn abort() -> ! {
-    use core::arch::asm;
-    loop {
-        unsafe {
-            asm!("wfi");
-        }
-    }
 }
 
 // TODO unit testing