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Realign

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gil 2024-05-17 10:55:43 -05:00
parent 7f183c7712
commit 1b90501975
1 changed files with 1 additions and 1 deletions
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src/main.rs
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@ -48,7 +48,7 @@ unsafe extern "C" fn _enter() -> ! {
"csrw mtvec, t1", "csrw mtvec, t1",
// Set MSIE, MTIE, and MEIE on machine interrupt enable CSR: // Set MSIE, MTIE, and MEIE on machine interrupt enable CSR:
// (1 << 3) = MSIE to enable machine-/M-mode software interrupts // (1 << 3) = MSIE to enable machine-/M-mode software interrupts
// | (1 << 7) = MTIE to enable M-mode timer interrupts (disabled for now) // | (1 << 7) = MTIE to enable M-mode timer interrupts (disabled for now)
// | (1 << 11) = MEIE to enable M-mode external interrupts // | (1 << 11) = MEIE to enable M-mode external interrupts
"li t2, (1 << 3) | (1 << 11)", "li t2, (1 << 3) | (1 << 11)",