Ordering nits, changing target

This commit is contained in:
gil 2024-05-28 21:17:29 -05:00
parent 6f6f012be9
commit 2753bc906b
2 changed files with 20 additions and 12 deletions

View file

@ -1,7 +1,7 @@
# .cargo/config.toml # .cargo/config.toml
[build] [build]
target = "riscv64imac-unknown-none-elf" target = "riscv64gc-unknown-none-elf"
# Options for riscv32 (not currently in use) # Options for riscv32 (not currently in use)
# #
@ -15,7 +15,7 @@ target = "riscv64imac-unknown-none-elf"
# -serial mon:stdio # -serial mon:stdio
# -bios """ # -bios """
[target.riscv64imac-unknown-none-elf] [target.riscv64gc-unknown-none-elf]
runner = """ qemu-system-riscv64 runner = """ qemu-system-riscv64
-cpu rv64 -cpu rv64
-smp 4 -smp 4

View file

@ -18,7 +18,7 @@ core::arch::global_asm!(include_str!("entry.s"));
#[allow(unreachable_code)] #[allow(unreachable_code)]
unsafe extern "C" fn start() { unsafe extern "C" fn start() {
use core::arch::asm; use core::arch::asm;
use riscv::register::{mstatus, pmpaddr0, satp, sie, sstatus}; use riscv::register::{mstatus, satp, sie, sstatus};
// Set previous privilege for all harts to M-mode, set previous interrupt // Set previous privilege for all harts to M-mode, set previous interrupt
// enable, and set floating-point unit to initial state // enable, and set floating-point unit to initial state
@ -26,6 +26,12 @@ unsafe extern "C" fn start() {
mstatus::set_mpie(); mstatus::set_mpie();
mstatus::set_fs(sstatus::FS::Initial); mstatus::set_fs(sstatus::FS::Initial);
// For use with
// asm!(
// "la t1, main",
// "csrw mepc, t1",
// );
// Disable paging // Disable paging
satp::write(0); satp::write(0);
@ -38,15 +44,14 @@ unsafe extern "C" fn start() {
sie::set_stimer(); sie::set_stimer();
sie::set_ssoft(); sie::set_ssoft();
// hhhh // Use PMP to give S-mode full access to memory
// pmpaddr0::write(0x3fffffffffffff_usize); // pmpaddr0::write(0x3fffffffffffff);
// TODO configure PMP // pmpcfg0::write(0xf);
// TODO timer init // TODO timer init
// Trying to figure out why I can't use mret here. Might need // Trying to figure out why I can't use mret here
// asm!( // asm!(
// "la t1, main",
// "csrw mepc, t1",
// "mret", // "mret",
// options(noreturn), // options(noreturn),
// ); // );
@ -64,7 +69,7 @@ extern "C" fn main() {
// Disable machine interrupts while initializing // Disable machine interrupts while initializing
interrupt::machine::disable(); interrupt::machine::disable();
console_init(); console_init();
// TODO Write boot message println!("boot: console initiated, setting up paging/processes (TODO)");
// TODO Set up paging // TODO Set up paging
// TODO Set up processes // TODO Set up processes
@ -73,6 +78,7 @@ extern "C" fn main() {
// TODO Set up PLIC // TODO Set up PLIC
kinit(); kinit();
unsafe { unsafe {
mstatus::set_mpp(mstatus::MPP::User); mstatus::set_mpp(mstatus::MPP::User);
mstatus::set_mpie(); mstatus::set_mpie();
@ -80,6 +86,8 @@ extern "C" fn main() {
mstatus::set_fs(sstatus::FS::Initial); mstatus::set_fs(sstatus::FS::Initial);
} }
println!("msg: Hello from hart {}!", hartid());
riscv::asm::fence(); // Emit a fence just in case riscv::asm::fence(); // Emit a fence just in case
}); });
@ -92,7 +100,7 @@ extern "C" fn main() {
INIT_LOCK.wait(); INIT_LOCK.wait();
riscv::asm::fence(); // Emit a fence just in case riscv::asm::fence(); // Emit a fence just in case
kinit_hart(); kinit_hart();
println!("Hello from hart {}!", hartid()); println!("msg: Hello from hart {}!", hartid());
} }
} }
@ -102,7 +110,7 @@ fn console_init() {
// Set up UART and print to console // Set up UART and print to console
uart::init_console(0x1000_0000); uart::init_console(0x1000_0000);
println!("Hello from hart {}!", hartid()); println!("init: console");
} }
fn kinit() {} fn kinit() {}