Ordering nits, changing target
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@ -1,7 +1,7 @@
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# .cargo/config.toml
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[build]
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target = "riscv64imac-unknown-none-elf"
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target = "riscv64gc-unknown-none-elf"
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# Options for riscv32 (not currently in use)
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#
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@ -15,7 +15,7 @@ target = "riscv64imac-unknown-none-elf"
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# -serial mon:stdio
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# -bios """
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[target.riscv64imac-unknown-none-elf]
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[target.riscv64gc-unknown-none-elf]
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runner = """ qemu-system-riscv64
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-cpu rv64
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-smp 4
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28
src/main.rs
28
src/main.rs
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@ -18,7 +18,7 @@ core::arch::global_asm!(include_str!("entry.s"));
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#[allow(unreachable_code)]
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unsafe extern "C" fn start() {
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use core::arch::asm;
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use riscv::register::{mstatus, pmpaddr0, satp, sie, sstatus};
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use riscv::register::{mstatus, satp, sie, sstatus};
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// Set previous privilege for all harts to M-mode, set previous interrupt
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// enable, and set floating-point unit to initial state
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@ -26,6 +26,12 @@ unsafe extern "C" fn start() {
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mstatus::set_mpie();
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mstatus::set_fs(sstatus::FS::Initial);
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// For use with
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// asm!(
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// "la t1, main",
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// "csrw mepc, t1",
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// );
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// Disable paging
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satp::write(0);
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@ -38,15 +44,14 @@ unsafe extern "C" fn start() {
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sie::set_stimer();
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sie::set_ssoft();
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// hhhh
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// pmpaddr0::write(0x3fffffffffffff_usize);
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// TODO configure PMP
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// Use PMP to give S-mode full access to memory
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// pmpaddr0::write(0x3fffffffffffff);
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// pmpcfg0::write(0xf);
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// TODO timer init
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// Trying to figure out why I can't use mret here. Might need
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// Trying to figure out why I can't use mret here
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// asm!(
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// "la t1, main",
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// "csrw mepc, t1",
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// "mret",
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// options(noreturn),
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// );
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@ -64,7 +69,7 @@ extern "C" fn main() {
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// Disable machine interrupts while initializing
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interrupt::machine::disable();
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console_init();
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// TODO Write boot message
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println!("boot: console initiated, setting up paging/processes (TODO)");
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// TODO Set up paging
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// TODO Set up processes
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@ -73,6 +78,7 @@ extern "C" fn main() {
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// TODO Set up PLIC
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kinit();
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unsafe {
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mstatus::set_mpp(mstatus::MPP::User);
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mstatus::set_mpie();
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@ -80,6 +86,8 @@ extern "C" fn main() {
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mstatus::set_fs(sstatus::FS::Initial);
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}
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println!("msg: Hello from hart {}!", hartid());
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riscv::asm::fence(); // Emit a fence just in case
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});
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@ -92,7 +100,7 @@ extern "C" fn main() {
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INIT_LOCK.wait();
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riscv::asm::fence(); // Emit a fence just in case
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kinit_hart();
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println!("Hello from hart {}!", hartid());
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println!("msg: Hello from hart {}!", hartid());
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}
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}
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@ -102,7 +110,7 @@ fn console_init() {
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// Set up UART and print to console
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uart::init_console(0x1000_0000);
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println!("Hello from hart {}!", hartid());
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println!("init: console");
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}
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fn kinit() {}
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