Rewrite some asm with riscv crate

This commit is contained in:
gil 2024-05-18 23:37:16 -05:00
parent 304152dbeb
commit 2cafa00346

View file

@ -1,8 +1,12 @@
// src/entry.rs // src/entry.rs
use riscv::register::mepc;
#[no_mangle] #[no_mangle]
#[link_section = ".text.init"] #[link_section = ".text.init"]
unsafe extern "C" fn _entry() { unsafe extern "C" fn _entry() {
use core::arch::asm; use core::arch::asm;
use riscv::register::{mhartid, satp, mstatus, sstatus};
// let id = riscv::register::mhartid::read(); // let id = riscv::register::mhartid::read();
// write_tp(&id); // write_tp(&id);
// TODO set up stack for all harts // TODO set up stack for all harts
@ -29,9 +33,9 @@ unsafe extern "C" fn _entry() {
".option pop", ".option pop",
); );
riscv::register::satp::write(0); satp::write(0);
let id = riscv::register::mhartid::read(); let id = mhartid::read();
if id != 0 { crate::abort(); } if id != 0 { crate::abort(); }
// Clear BSS section // Clear BSS section
@ -45,10 +49,13 @@ unsafe extern "C" fn _entry() {
"bne t0, t1, 1b", "bne t0, t1, 1b",
"2:", "2:",
"la sp, _stack_end", "la sp, _stack_end"
);
"li t0, (0b11 << 11) | (1 << 13)", mstatus::set_mpp(mstatus::MPP::Machine);
"csrw mstatus, t0", mstatus::set_fs(sstatus::FS::Initial);
asm!(
"csrw mie, x0", "csrw mie, x0",
"la t1, {kinit}", "la t1, {kinit}",
@ -59,6 +66,7 @@ unsafe extern "C" fn _entry() {
"2:", "2:",
kinit = sym kinit, kinit = sym kinit,
); );
} }
#[no_mangle] #[no_mangle]