Begin rewriting entry

src/entry.rs

@@ -0,0 +1,14 @@
+unsafe extern "C" fn _enter() -> ! {
+    let id = riscv::register::mhartid::read();
+    crate::entry::write_tp(&id);
+}
+
+#[inline]
+unsafe fn write_tp(id: &usize) -> ! {
+    use core::arch::asm;
+    asm!(
+        "csrw mhartid, {id}",
+        id = in(reg) id,
+        options(noreturn)
+    );
+}

src/main.rs

@@ -5,6 +5,7 @@
 
 use core::panic::PanicInfo;
 
+mod entry;
 mod heap;
 mod trap;
 mod uart;
@@ -120,8 +121,8 @@ fn panic(info: &PanicInfo) -> ! {
 
 #[no_mangle]
 extern "C" fn abort() -> ! {
-    use core::arch::asm;
-    loop { unsafe { asm!("wfi"); } }
+    // loop wait for interrupt
+    loop { riscv::asm::wfi(); }
 }
 
 // TODO unit testing