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Set mstatus and mie CSRs

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gil 2024-05-16 11:47:44 -05:00
parent 6b697a4ca5
commit a908bcc0e4
1 changed files with 15 additions and 2 deletions
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17
src/main.rs
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@ -39,8 +39,21 @@ unsafe extern "C" fn _enter() -> ! {
// set the stack pointer // set the stack pointer
"la sp, _init_stack_top", "la sp, _init_stack_top",
"la t2, {trap_vector}", // We use mret here so that the mstatus register
"csrw mtvec, t2", // is properly updated.
"li t0, (0b11 << 11) | (1 << 7) | (1 << 3)",
"csrw mstatus, t0",
// Set mtvec to the location of our trap handler function
"la t1, {trap_vector}",
"csrw mtvec, t1",
// Set MSIE, MTIE, and MEIE on machine interrupt enable CSR:
// MSIE to enable machine-/M-mode software interrupts
// MTIE to enable M-mode timer interrupts
// MEIE to enable M-mode external interrupts
"li t2, (1 << 3) | (1 << 7) | (1 << 11)",
"csrw mie, t2",
// clear the BSS // clear the BSS
"la t0, _bss_start", "la t0, _bss_start",