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Add to-do and set interrupt CSRs

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gil 2024-05-16 10:39:53 -05:00
parent aaf64d0a2d
commit be4bc6e270
1 changed files with 6 additions and 0 deletions
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6
src/main.rs
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@ -12,6 +12,7 @@ mod uart;
#[no_mangle] #[no_mangle]
#[link_section = ".text.init"] #[link_section = ".text.init"]
unsafe extern "C" fn _enter() -> ! { unsafe extern "C" fn _enter() -> ! {
// TODO see if possible to replace this somehow...
use core::arch::asm; use core::arch::asm;
asm!( asm!(
// load hartid into t0; if t0 =/= 0, then jump to busy loop // load hartid into t0; if t0 =/= 0, then jump to busy loop
@ -42,6 +43,11 @@ unsafe extern "C" fn _enter() -> ! {
"bne t0, t1, 1b", "bne t0, t1, 1b",
"2:", "2:",
// BSS is clear! // BSS is clear!
// delegate all traps to S-mode trap handler
"li t5, 0xffff",
"csrw medeleg, t5", // delegate all machine exceptions
"csrw mideleg, t5", // delegate all machine interrupts
"j 4f", "j 4f",
// busy loop if hartid =/= 0 // busy loop if hartid =/= 0