Make init lock less ambiguous, add fences

This commit is contained in:
gil 2024-05-20 09:42:25 -05:00
parent 325fa3c147
commit eee7c6f02b

View file

@ -1,6 +1,6 @@
// src/entry.rs
static READY: spin::Once<()> = spin::Once::new();
static INIT_LOCK: spin::Once<()> = spin::Once::new();
/// After some initialization in asm/entry.S, the kernel will jump here and
/// each hart will have its own setup sequence.
@ -42,7 +42,7 @@ extern "C" fn main() {
use riscv::register::{mstatus, sstatus};
if hartid() == 0 {
READY.call_once(|| {
INIT_LOCK.call_once(|| {
// Disable machine interrupts while initializing
interrupt::machine::disable();
// TODO Initialize console
@ -62,10 +62,11 @@ extern "C" fn main() {
mstatus::set_fs(sstatus::FS::Initial);
}
riscv::asm::fence();
riscv::asm::fence(); // Emit a fence just in case
});
} else {
READY.wait();
INIT_LOCK.wait();
riscv::asm::fence(); // Emit a fence just in case
kinit_hart();
}
}