gil
|
8cfd1c245a
|
Update readme
|
2024-05-14 12:11:54 -05:00 |
|
gil
|
7cd1869f20
|
Updated README
|
2024-05-14 11:12:11 -05:00 |
|
gil
|
9bb75720c5
|
Removed redundant stack pointer initialization from _start
|
2024-05-14 10:09:16 -05:00 |
|
gil
|
4c3bfa3052
|
Reindent
|
2024-05-14 10:06:57 -05:00 |
|
gil
|
c22e3e4376
|
Initializing heap
|
2024-05-14 10:03:08 -05:00 |
|
gil
|
f43f41800f
|
Commented out riscv32 target
|
2024-05-14 09:43:38 -05:00 |
|
gil
|
3e197b9882
|
Rename project and change target to riscv64imac
|
2024-05-14 09:41:57 -05:00 |
|
gil
|
7c7bb75d4c
|
Clarify comment in build script
|
2024-05-14 00:05:58 -05:00 |
|
gil
|
e1ea4cc21c
|
Update build script convention to change from cargo: (deprecated) to cargo::
|
2024-05-13 23:08:09 -05:00 |
|
gil
|
41a450393e
|
Add rx ability to uart
|
2024-05-13 22:59:41 -05:00 |
|
gil
|
5490a2ffd6
|
Add disclaimer
|
2024-05-13 22:14:16 -05:00 |
|
gil
|
fc7eb5dfce
|
Create module uart
|
2024-05-13 22:12:29 -05:00 |
|
gil
|
556a9841e5
|
Prints 'Hello World'
|
2024-05-13 22:07:46 -05:00 |
|
gil
|
78f93533a4
|
Prettifying
|
2024-05-13 21:42:49 -05:00 |
|
gil
|
78ba8f22a6
|
Add links to RISC-V spec pdfs
|
2024-05-13 21:37:28 -05:00 |
|
gil
|
2cce36b132
|
Added more readings
|
2024-05-13 17:39:00 -05:00 |
|
gil
|
63a2a76b0b
|
Initial commit
|
2024-05-13 17:31:37 -05:00 |
|